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Disambiguation of "Naganuma, Jiro"

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Multi-reference and multi-block-size motion estimation with flexible mode selection for professional 4: 2: 2 H.264/AVC encoder LSI.

, , , , and . ISCAS, page 800-803. IEEE, (2008)

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Jiro Inaba

Jiro Miyazawa

Dania al- Jiroudi

Elena Jiron

Delia Jiroveanu

 

Other publications of authors with the same name

Single-Chip MPEG-2 422P@HL CODEC LSI With Multichip Configuration for Large Scale Processing Beyond HDTV Level., , , , , , , , , and 3 other author(s). IEEE Trans. Very Large Scale Integr. Syst., 15 (9): 1055-1059 (2007)Single-Chip MPEG-2 422P@HL CODEC LSI with Multi-Chip Configuration for Large Scale Processing beyond HDTV Level., , , , , , , , , and 1 other author(s). DATE, page 20002-20007. IEEE Computer Society, (2003)On-Chip Multimedia Real-Time OS and its MPEG-2 Applications., , , and . RTCSA, page 200-203. IEEE Computer Society, (1999)New set-top box for interactive visual communication of home entertainment using MPEG-2 full-duplex CODEC LSI., , , , , and . IEEE Trans. Consumer Electronics, 51 (2): 640-641 (2005)A distributed TS-MUX architecture for multi-chip extension beyond the HDTV level., , , , and . ISCAS (2), page 261-264. IEEE, (2004)Highly accurate de-jittering scheme for broadcast quality video transmission., , , , and . Syst. Comput. Jpn., 37 (10): 81-88 (2006)MPEG-2 real-time software CODEC for full-duplex transmission application over IP networks., , , and . Syst. Comput. Jpn., 36 (2): 33-41 (2005)High-speed Software-based Platform for Embedded Software of a Single-chip MPEG-2 Video Encoder LSI with HDTV Scalabilit., , , , and . DATE, page 303-308. IEEE Computer Society / ACM, (1999)A Highly OR-Parallel Inference Machine (Multi-ASCA) and Its Performance Evaluation: An Architecture and Its Load Balancing Algorithms., and . IEEE Trans. Computers, 43 (9): 1062-1075 (1994)Multi-reference and multi-block-size motion estimation with flexible mode selection for professional 4: 2: 2 H.264/AVC encoder LSI., , , , and . ISCAS, page 800-803. IEEE, (2008)