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Path-Directed Abstraction and Refinement for SAT-Based Design Debugging., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 32 (10): 1609-1622 (2013)Automating Logic Transformations With Approximate SPFDs., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 30 (5): 651-664 (2011)Truthful Decentralized Blockchain Oracles., , , and . Int. J. Netw. Manag., (2022)Managing verification error traces with bounded model debugging., , and . ASP-DAC, page 601-606. IEEE, (2010)Automated debugging of missing assumptions., , , and . ASP-DAC, page 732-737. IEEE, (2014)On Public Decentralized Ledger Oracles via a Paired-Question Protocol., , , and . IEEE ICBC, page 337-344. IEEE, (2019)Sequential logic rectifications with approximate SPFDs., , , , and . DATE, page 1698-1703. IEEE, (2009)Suspect set prediction in RTL bug hunting., , and . DATE, page 1544-1549. IEEE, (2018)Automating Data Analysis and Acquisition Setup in a Silicon Debug Environment., , and . IEEE Trans. Very Large Scale Integr. Syst., 20 (6): 1118-1131 (2012)On the Latency and Energy of Checkpointed Superscalar Register Alias Tables., , and . IEEE Trans. Very Large Scale Integr. Syst., 18 (3): 365-377 (2010)