%0 Journal Article %1 journals/tjs/YazdinejadBJ18 %A Yazdinejad, Abbas %A Bohlooli, Ali %A Jamshidi, Kamal %D 2018 %J J. Supercomput. %K dblp %N 3 %P 1299-1320 %T Efficient design and hardware implementation of the OpenFlow v1.3 Switch on the Virtex-6 FPGA ML605. %U http://dblp.uni-trier.de/db/journals/tjs/tjs74.html#YazdinejadBJ18 %V 74

@article{journals/tjs/YazdinejadBJ18, added-at = {2022-01-03T00:00:00.000+0100}, author = {Yazdinejad, Abbas and Bohlooli, Ali and Jamshidi, Kamal}, biburl = {https://www.bibsonomy.org/bibtex/25ee8cedfc6a551306a668259ca3cc0df/dblp}, ee = {https://doi.org/10.1007/s11227-017-2175-7}, interhash = {9abbe289ffa6a458443553a7ce5be896}, intrahash = {5ee8cedfc6a551306a668259ca3cc0df}, journal = {J. Supercomput.}, keywords = {dblp}, number = 3, pages = {1299-1320}, timestamp = {2024-04-08T14:34:03.000+0200}, title = {Efficient design and hardware implementation of the OpenFlow v1.3 Switch on the Virtex-6 FPGA ML605.}, url = {http://dblp.uni-trier.de/db/journals/tjs/tjs74.html#YazdinejadBJ18}, volume = 74, year = 2018 }